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IBM POWER Instruction Set Architecture
POWER is a reduced instruction set computer (RISC) instruction set architecture (ISA) developed by IBM. The name is an acronym for ''Performance Optimization With Enhanced RISC''.
The ISA is used as base for high end microprocessors from IBM during the 1990s and were used in many of IBM's servers, minicomputers, workstations, and supercomputers. These processors are called POWER1 (RIOS-1, RIOS.9, RSC, RAD6000) and POWER2 (POWER2, POWER2+ and P2SC).
The ISA evolved into the PowerPC instruction set architecture and was deprecated in 1998 when IBM introduced the POWER3 processor that was mainly a 32/64 bit PowerPC processor but included the POWER ISA for backwards compatibility. The POWER ISA wasn't developed any further after that and wasn't used in any processors after that.
Appendix E of (Book I: PowerPC User Instruction Set Architecture ) of (PowerPC Architecture Book, Version 2.02 ) describes the differences between the POWER and POWER2 instruction set architectures and the version of the PowerPC instruction set architecture implemented by the POWER5.
==History==
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